This invention relates to an electronic power monolithically integrated on a semiconductor substrate and having edge protection structure limited planar size.
The invention specifically relates to a monolithic semiconductor device wherein P/N junctions are capable of sustaining high operating voltages, a base-collector junction of an NPN bipolar transistor being exemplary of these.
The invention further relates to a method of manufacturing the protection structure of limited planar size.
The invention relates, particularly but not exclusively, to a structure of limited planar size which functions as an edge structure for a VIPOWER type of power device, and the description to follow will make reference to this field of application for convenience of illustration only.
As is known, in semiconductor electronic devices, most of the P/N junctions fabricated with planar technology comprise basically a first semiconductor region having a first type of conductivity and being diffused into a second semiconductor region with the opposite type of conductivity from the first. An insulating layer of silicon oxide is laid over both regions, and metal contacts are then formed to establish an electric connection to the two semiconductor regions.
A depleted region is associated with the P/N junction. This depleted region can be regarded as formed of two regions: a first region along a planar region of the junction, and the second region at the edges of the planar region.
In the planar region, the equipotential lines lie parallel to the junction, the peak electric field is centered at the junction, and the field breakdown occurs upon the field reaching its critical value. Referring to FIG. 1, the equipotential lines curve and are more crowded together at the junction edges than in the planar region, due to the junction depth being finite. Consequently, the electric field at the edge region is increased; stronger electric fields being associated with smaller radii of curvature.
The breakdown voltage of a finite P/N junction is usually lower than that associated with the corresponding planar junction because of the electric field being much stronger at the edge region. The breakdown voltage ratio between the edge and the planar portion is, therefore, smaller than unity. Thus, an ability to define and implement technical solutions which can limit the drop in the critical electric field at the edge regions of the structure acquires special importance.
A first prior approach to filling this demand provided for the use of metal field plates located proximate to the structure edge. The field plates are not in direct contact with the silicon surface, but rest on the previously deposited, or grown, layer of silicon oxide.
Referring to FIG. 2, a major feature of metal layers immersed in an electric field is that they are set at a single potential throughout their spread. Accordingly, the metal field plates, if suitably dimensioned, will force the depleted region to span a large area, thus preventing crowding of the equipotential lines.
While being in several ways advantageous, this first of the prior approaches has certain drawbacks. For devices which are to endure high operating voltages, the surface electric field still remains high, and even if below the critical value, may be sensitive to the amount of surface charge brought about by the presence of moving charges or fixed charges at the oxide/silicon interface, introduced during the process steps for manufacturing the power devices.
A second prior approach, disclosed in GB-A-216597, proposes high-resistivity rings placed in electric contact with the main junction to be protected. Referring to FIG. 3, this approach, by forcing the depleted region to span broader regions, also results in thinned equipotential lines and, hence, a weaker surface electric field.
Although achieving its objective, not even this prior approach is devoid of shortcomings. The presence of high-resistivity rings gives rise to peaks in the electric field near the interface between any two rings and at the edge of the outermost ring. Furthermore, the ring structure increases the space requirements of the device. In fact, a reduction in the surface electric field is made dependent on the number and the width of the high-resistivity rings. Accordingly, devices operated in a high voltage range require edge structures of large planar size.
An embodiment of the invention provides a device for high-voltage operation with protection structures effective to combine proper performance of the device through its operational range with reduced planar size, thereby overcoming the drawbacks of devices according to the prior art.
The device is an electronic power device with a protective structure of limited planar size by using trench structures of substantial thickness formed within the silicon substrate and completely filled with dielectric material. The presence of a trench in direct contact with the P/N junction is effective, in a reverse bias situation, to cause the equipotential lines to crowd together within the trench-filling dielectric material.
Since the critical (breakdown) electric field for the dielectric material, e.g., silicon oxide, is approximately 600V/xcexcm, whereas the critical electric field for silicon is approximately 20V/xcexcm, the oxide-filled trench structure can be made much smaller than edge structures according to the prior art.
As an example, a conventional edge structure for a power device which is to sustain a reverse bias voltage of 700V would account for approximately 40% of the device total area, whereas an edge structure according to this invention would be a planar size equal to about 10-15% of the device total area.